
Chapter 7 Hardware Implementation Tools
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A TI TMS320C6713 DSP operating at 225 MHz.
An AIC 23 stereo codec.
4 user LEDs and 4 DIP switches.
16 MB SDRAM and 512 KB non-volatile Flash memory.
Software board configuration through registers implemented in CPLD.
JTAG (Joint Test Action Group) emulation through on-board JTAG emulator with USB
host interface or external emulator.
Single voltage power supply (+5V).
Fig. 7.2 DSK 6713 block diagram
7.2.1 Functional Overview of DSK 6713
The DSP on the 6713 DSK interfaces to on-board peripherals through a 32-bit wide
EMIF (External Memory Interface). The SDRAM, Flash and CPLD are all connected to the bus.
All addresses are 32 bits wide. Portions of the internal memory can be reconfigured in software
as L2 cache rather than fixed RAM. The DSP interfaces to analog audio signals through on-
board TLV320AIC23 codec and 3.5mm audio jacks (microphone input, line input, line output
and headphone output). The codec can select the microphone input (monaural input) or the line
input (stereo input) as active input. The analog output is driven to both the line out (fixed gain)
and headphone/speaker out (adjustable gain) connectors. The codec communicates using two
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